Mobile communication devices may include a variety of components including circuit boards, integrated circuit (IC) devices and/or System-on-Chip (SoC) devices. The components may include processing devices, user interface components, storage and other peripheral components that communicate through a shared data communication bus, which may include a multi-drop serial bus or a parallel bus. General-purpose serial interfaces known in the industry include the Inter-Integrated Circuit (I2C or I2C) serial interface and its derivatives and alternatives.
The Mobile Industry Processor Interface (MIPI) Alliance defines standards and protocols for the Improved Inter-Integrated Circuit (BC) serial interface, the Radio Frequency Front-End (RFFE) interface, the system power management interface (SPMI) and other interfaces. These interfaces may be used to connect processors, sensors and other peripherals, for example. In some interfaces, multiple bus masters are coupled to the serial bus such that two or more devices can serve as bus master for different types of messages transmitted on the serial bus. The RFFE interface defines a communication interface that can be for controlling various radio frequency (RF) front-end devices, including power amplifier (PA), low-noise amplifiers (LNAs), antenna tuners, filters, sensors, power management devices, switches, etc. These devices may be collocated in a single IC device or provided in multiple IC devices. In a mobile communication device, multiple antennas and radio transceivers may support multiple concurrent RF links. The SPMI provides a hardware interface that may be implemented between baseband or application processors and peripheral components. In some instances, the SPMI is deployed to support power management operations within a device.
In many instances, a multi-drop serial bus may be provided to support large numbers of devices that implement complex applications. For example, mobile communication devices include numerous components that are expected to cooperate in order to support increasing levels of functionality. It can be expected that increases in data throughput will be required to accommodate demands generated by increasingly complex applications. It is typically impractical to continually increase data throughput solely by raising clock frequencies.